BROCHURE
Naresh Kumar Reddy is a Assistant Professor,ICFAI Tech,India

Naresh Kumar Reddy

Assistant Professor

Organizing Committee

India

ICFAI Tech

PUBLICATIONS

B. Naresh Kumar Reddy, Vasantha.M.H. and Nithin Kumar Y.B., “An Energy-Efficient Fault-Aware Core Mapping in Mesh-based Network on Chip Systems,” Journal of Network and Computer Applications.

B. Naresh Kumar Reddy, Vasantha.M.H., and Nithin Kumar Y.B., “System-Level Fault-Tolerance Core Mapping and FPGA-based Verification of NoC," Microelectronics Journal.

B. Naresh Kumar Reddy, Vasantha.M.H., and Nithin Kumar Y.B., “High- Performance and Energy-Efficient Fault-Tolerance Core Mapping in NoC,” Sustainable Computing, Informatics and Systems.

B. Naresh Kumar Reddy, Vasantha.M.H. and Nithin Kumar Y.B., “Hardware Implementation of Fault Tolerance NoC Core Mapping,” Telecommunication Systems (TELS.

B. Naresh Kumar Reddy, Vasantha.M.H. and Nithin Kumar Y.B., “Energy-Aware and Reliability- Aware Mapping for NoC-Based Architectures,” Wireless Personal Communications.

B. Naresh Kumar Reddy “Design and implementation of high performance and area-efficient square architecture using Vedic Mathematics," Analog Integr Circ Sig Process, 2020.

B. Naresh Kumar Reddy, BV Vani, GB Lahari “An efficient design and implementation of Vedic multiplier in quantum-dot cellular automata," Telecommunication Systems, 2020.

B. Naresh Kumar Reddy, C Ramalingaswamy, R Nagulapalli, D Ramesh, “A novel 8T SRAM with improved cell density,” Analog Integr Circ Sig Process.

Chintala Yehoshua, B. Naresh Kumar Reddy, Venkata Reddy Ambati, Suresh Kumar Pittala, “A novel CMOS GMC complex filter design for multi-mode multi-band wireless receiver applications,” Analog Integr Circ Sig Process.

B. Naresh Kumar Reddy, Dharavath Kishan, and B. Veena Vani, “Performance constrained multi-application network-on-chip core mapping,” International Journal of Speech Technology.

Chang Chua and B. Naresh Kumar Reddy, “An improved design and simulation of low-power and area-efficient parallel binary comparator," Microelectronics Journal.

Chang Chua, B. Naresh Kumar Reddy, B. Sireesha “Design and analysis of low-power and area-efficient N-bit parallel binary comparator," Analog Integr Circ Sig Process.

Ramalingaswamy Cheruku, Damodar Reddy Edla, Venkatanareshbabu Kuppili, Ramesh Dharavath and B. Naresh Kumar Reddy, “Automatic Disease Diagnosis using Optimized Weightless Neural Networks for Low-Power Wearable Devices,” IET Healthcare Technology Letters.

B. Naresh Kumar Reddy, N. Venktram and Sireesha, “An Efficient Data Transmission by using Modern USB Flash Drive," International Journal of Electrical and Computer Engineering.

J.V. N. Ramesh, B. Naresh Kumar Reddy, V. V. Murali Krishna, B. M. Kumar Gandhi, V. Shiva and M. Dronika Devi, “An Effective Self-Test Scheduling For Real-time Processor-Based System,” International Journal of Smart Home.

K.Lavanya, B. Naresh Kumar Reddy, C.Naga Raju and K.Sridhar, “Framework for Enhancing Level of Security to the ATM Customers with DCT based Palm Print Recognition,“ International Journal of Applied Engineering Research.

G.L.N.Murthy, B.Anuradha, CH. Siva Rama Krishna, B. Naresh Kumar Reddy and J.V.N.Ramesh, “Effective utilization of labeling algorithms for Hippocampus segmentation,” European Journal of Scientific Research.

B. Naresh Kumar Reddy, Vasantha M.H, Nithin Kumar Y.B “Survey on Performance and Energy consumption of Fault Tolerance in Network on Chip,” International Journal of Reconfigurable and Embedded Systems.

B. Naresh Kumar Reddy, N. Suresh and J.V.N. Ramesh “A Gracefully Degrading and Energy-Efficient FPGA Programming using LabVIEW,” International Journal of Reconfigurable and Embedded Systems.

B. Naresh Kumar Reddy and N. Suresh, “An Efficient Approach for Design and Testing of FPGA Programming using LabVIEW,” International Journal of Reconfigurable and Embedded Systems.

B. Naresh Kumar Reddy Beechu,b.siva Hari prasad b.y.v.n.r.swamy “Innovative Water Saving Agriculture By Using Resources,” International Journal of Electrical and Computer Engineering.

B. Naresh Kumar Reddy, Vasantha.M.H. and Nithin Kumar Y.B., “Multi-Application Mapping and Scheduling Tasks on Network on Chip,” IEEE Transactions on Very Large Scale Integration Systems.

RESEARCH INTEREST

Multi-Processor System on Chip, Digital VLSI, Embedded Systems.

HONORS AND AWARDS

Received Outstanding Ph.D. Thesis Award for the contribution in the VLSI & Embedded Systems research area during International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE-2019) at Delhi Technological University.

Received Visveswaraya Ph.D. Scholarship from MeitY.

Received Intel fellowship From Jan 2017 to Jun 2017.

GATE Scholarship, In 2012 for pursuing M.Tech got a scholarship from the Ministry of Human Resource and Development, Government of India.

Upcoming Conferences